Inventor · disambiguated record
Michael Krasnicki
Also filed as: KRASNICKI MICHAEL · KRASNICKI MICHAEL J
20 granted patents·22 citations·filing 2009–2021
91Inventor score
Top patents by PatentIndex Score
20 records- 0191US9875325B2Computer implemented system and method of identification of useful untested states of an electronic designZIPALOG INC·Filed 2015·Granted Jan 23, 2018·8 cites·12 claims
- 0282US10402505B2Computer implemented system and method of translation of verification commands of an electronic designZIPALOG INC·Filed 2017·Granted Sep 3, 2019·3 cites·39 claims
- 0379US10963608B2System and method for passive verificationZIPALOG INC·Filed 2020·Granted Mar 30, 2021·1 cites·20 claims
- 0475US10262093B2Computer implemented system and method of identification of useful untested states of an electronic designZIPALOG INC·Filed 2018·Granted Apr 16, 2019·1 cites·14 claims
- 0573US8930877B1Method and system of change evaluation of an electronic design for verification confirmationZIPALOG INC·Filed 2013·Granted Jan 6, 2015·3 cites·13 claims
- 0672US11436883B2Secured tethering process between devicesHAMPTON PRODUCTS INT CORPORATION·Filed 2019·Granted Sep 6, 2022·2 cites·20 claims
- 0771US11657201B2Computer implemented system and method of identification of useful untested states of an electronic designZIPALOG INC·Filed 2021·Granted May 23, 2023·0 cites·20 claims
- 0870US9147026B2Method and system of change evaluation of an electronic design for verification confirmationZIPALOG INC·Filed 2014·Granted Sep 29, 2015·2 cites·23 claims
- 0968US11003824B2Computer implemented system and method of identification of useful untested states of an electronic designZIPALOG INC·Filed 2020·Granted May 11, 2021·0 cites·20 claims
- 1067US11704448B2Computer implemented system and method of translation of verification commands of an electronic designZIPALOG INC·Filed 2021·Granted Jul 18, 2023·0 cites·20 claims
- 1165US11074373B2Computer implemented system and method of translation of verification commands of an electronic designZIPALOG INC·Filed 2020·Granted Jul 27, 2021·0 cites·20 claims
- 1264US10691857B2Computer implemented system and method of identification of useful untested states of an electronic designZIPALOG INC·Filed 2019·Granted Jun 23, 2020·0 cites·20 claims
- 1363US10599793B2System and method for passive verificationZIPALOG INC·Filed 2019·Granted Mar 24, 2020·0 cites·20 claims
- 1462US10621290B2Computer implemented system and method of translation of verification commands of an electronic designZIPALOG INC·Filed 2019·Granted Apr 14, 2020·0 cites·51 claims
- 1559US10339237B2System and method for passive verificationZIPALOG INC·Filed 2018·Granted Jul 2, 2019·0 cites·20 claims
- 1657USD973518SHVAC controller housingLENNOX IND INC·Filed 2021·Granted Dec 27, 2022·2 cites·1 claims
- 1756US9886536B2System and method for passive verificationZIPALOG INC·Filed 2016·Granted Feb 6, 2018·0 cites·25 claims
- 1850US9536028B2Method and system of change evaluation of an electronic design for verification confirmationZIPALOG INC·Filed 2015·Granted Jan 3, 2017·0 cites·20 claims
- 1944US9715566B2Computer implemented system and method of translation of verification commands of an electronic designZIPALOG INC·Filed 2015·Granted Jul 25, 2017·0 cites·31 claims
- 2034US10474784B2Method and system for defining generic topologies for use in topology matching enginesHAMBARDZUMYAN MINAS·Filed 2009·Granted Nov 12, 2019·0 cites·22 claims
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