Inventor · disambiguated record
Alexander V. Butuzov
Also filed as: BUTUZOV ALEXANDER · BUTUZOV ALEXANDER V
5 granted patents·5 pending applications·9 citations·filing 2009–2016
71Inventor score
Technology areasG06F
Top patents by PatentIndex Score
10 records- 0170US10133582B2Instruction and logic for identifying instructions for retirement in a multi-strand out-of-order processorINTEL CORP·Filed 2013·Granted Nov 20, 2018·3 cites·20 claims
- 0265US9645819B2Method and apparatus for reducing area and complexity of instruction wakeup logic in a multi-strand out-of-order processorIYER JAYESH·Filed 2012·Granted May 9, 2017·3 cites·30 claims
- 0362US9632790B2Select logic for the instruction scheduler of a multi strand out-of-order processor based on delayed reconstructed program orderINTEL CORP·Filed 2012·Granted Apr 25, 2017·2 cites·21 claims
- 0453US9529596B2Method and apparatus for scheduling instructions in a multi-strand out of order processor with instruction synchronization bits and scoreboard bitsBABAYAN BORIS A·Filed 2011·Granted Dec 27, 2016·1 cites·12 claims
- 0548US2017235578A1Method and Apparatus for Scheduling of Instructions in a Multi-Strand Out-Of-Order ProcessorINTEL CORP·Filed 2016·Application pending·0 cites
- 0645US2010274972A1Systems, methods, and apparatuses for parallel computingBABAYAN BORIS·Filed 2009·Application pending·0 cites
- 0742US2016364237A1Processor logic and method for dispatching instructions from multiple strandsINTEL CORP·Filed 2014·Application pending·0 cites
- 0833US2014208074A1Instruction scheduling for a multi-strand out-of-order processorBABAYAN BORIS A·Filed 2012·Application pending·0 cites
- 0932US9811340B2Method and apparatus for reconstructing real program order of instructions in multi-strand out-of-order processorKOSAREV NIKOLAY·Filed 2012·Granted Nov 7, 2017·0 cites·21 claims
- 1032US2017161075A1Increasing processor instruction window via seperating instructions according to criticalityINTEL CORP·Filed 2015·Application pending·0 cites
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