Inventor · disambiguated record
Masayuki Hamada
Also filed as: HAMADA MASAYUKI
15 granted patents·230 citations·filing 1996–2023
93Inventor score
Top patents by PatentIndex Score
15 records- 0190US6815281B1Method of manufacturing a semiconductor device having a memory cell section and an adjacent circuit sectionNEC ELECTRONICS CORP·Filed 2000·Granted Nov 9, 2004·33 cites·6 claims
- 0274US6133641ASemiconductor substrate and method of manufacturing semiconductor deviceNEC CORP·Filed 1998·Granted Oct 17, 2000·41 cites·9 claims
- 0367US5920280AFMCW radar and method for estimating distance and relative velocityMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1998·Granted Jul 6, 1999·62 cites·14 claims
- 0466US6544840B2Semiconductor memory device and manufacturing method and mask data preparing method for the sameNEC CORP·Filed 2002·Granted Apr 8, 2003·9 cites·6 claims
- 0565US12485472B2Pressed article, pressing device, and pressing methodDENSO CORP·Filed 2023·Granted Dec 2, 2025·0 cites·10 claims
- 0663US6380049B1Semiconductor substrate and method of manufacturing semiconductor deviceNEC CORP·Filed 2000·Granted Apr 30, 2002·10 cites·6 claims
- 0762US8710569B2Semiconductor device and manufacturing method thereofINOUE KEN·Filed 2012·Granted Apr 29, 2014·1 cites·17 claims
- 0862US6469337B1Semiconductor memory device and manufacturing method and mask data preparing method for the sameNEC CORP·Filed 2000·Granted Oct 22, 2002·7 cites·10 claims
- 0961US7327622B2Semiconductor deviceNEC ELECTRONICS CORP·Filed 2006·Granted Feb 5, 2008·2 cites·15 claims
- 1061US5999880ARelative car positioning system using car communicationMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1997·Granted Dec 7, 1999·45 cites·17 claims
- 1149US8101986B2Dynamic random access memory with silicide contacts, CMOS logic section and LDD structureINOUE KEN·Filed 2005·Granted Jan 24, 2012·0 cites·14 claims
- 1245US6211059B1Method of manufacturing semiconductor device having contacts with different depthsNEC CORP·Filed 1999·Granted Apr 3, 2001·12 cites·10 claims
- 1341US6403404B1Method of selectively forming a silicide layer on a logic area of a semiconductor substrateNEC CORP·Filed 2000·Granted Jun 11, 2002·1 cites·10 claims
- 1439US8610219B2Semiconductor device having a memory cell section, an adjacent circuit section, and silicide formed on an impurity diffused regionINOUE KEN·Filed 2004·Granted Dec 17, 2013·0 cites·26 claims
- 1537US5972778AMethod of fabricating semiconductor deviceNEC CORP·Filed 1996·Granted Oct 26, 1999·7 cites·19 claims
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