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LOGICVISION INC

US51 patents

Top patents by PatentIndex Score

US6829730B2Dec 7, 2004

Method of designing circuit having multiple test access ports, circuit produced thereby and method of using same

LOGICVISION INC192 citations99

US7370251B2May 6, 2008

Method and circuit for collecting memory failure information

LOGICVISION INC55 citations98

US6671839B1Dec 30, 2003

Scan test method for providing real time identification of failing test patterns and test bist controller for use therewith

LOGICVISION INC96 citations98

US6510534B1Jan 21, 2003

Method and apparatus for testing high performance circuits

LOGICVISION INC82 citations97

US6760874B2Jul 6, 2004

Test access circuit and method of accessing embedded test controllers in integrated circuit modules

LOGICVISION INC54 citations96

US6586921B1Jul 1, 2003

Method and circuit for testing DC parameters of circuit input and output nodes

LOGICVISION INC93 citations96

US6492798B2Dec 10, 2002

Method and circuit for testing high frequency mixed signal circuits with low frequency signals

LOGICVISION INC58 citations96

US6204694B1Mar 20, 2001

Programmable clock signal generation circuits and methods for generating accurate, high frequency, clock signals

LOGICVISION INC96 citations96

US6115827ASep 5, 2000

Clock skew management method and apparatus

LOGICVISION INC72 citations96

US5900753AMay 4, 1999

Asynchronous interface

LOGICVISION INC76 citations96

US6363520B1Mar 26, 2002

Method for testability analysis and test point insertion at the RT-level of a hardware development language (HDL) specification

LOGICVISION INC85 citations95

US6442722B1Aug 27, 2002

Method and apparatus for testing circuits with multiple clocks

LOGICVISION INC220 citations94

US6396889B1May 28, 2002

Method and circuit for built in self test of phase locked loops

LOGICVISION INC70 citations94

US6327684B1Dec 4, 2001

Method of testing at-speed circuits having asynchronous clocks and controller for use therewith

LOGICVISION INC119 citations94

US6211803B1Apr 3, 2001

Test circuit and method for measuring switching point voltages and integral non-linearity (INL) of analog to digital converters

LOGICVISION INC55 citations94

US7617425B2Nov 10, 2009

Method for at-speed testing of memory interface using scan

LOGICVISION INC20 citations93

US7155651B2Dec 26, 2006

Clock controller for at-speed testing of scan circuits

LOGICVISION INC31 citations93

US6763489B2Jul 13, 2004

Method for scan testing of digital circuit, digital circuit for use therewith and program product for incorporating test methodology into circuit description

LOGICVISION INC31 citations93

US6745359B2Jun 1, 2004

Method of masking corrupt bits during signature analysis and circuit for use therewith

LOGICVISION INC49 citations93

US6487688B1Nov 26, 2002

Method for testing circuits with tri-state drivers and circuit for use therewith

LOGICVISION INC25 citations93

US7159159B2Jan 2, 2007

Circuit and method for adding parametric test capability to digital boundary scan

LOGICVISION INC27 citations92

US6885213B2Apr 26, 2005

Circuit and method for accurately applying a voltage to a node of an integrated circuit

LOGICVISION INC33 citations92

US6725435B2Apr 20, 2004

Method and program product for completing a circuit design having embedded test structures

LOGICVISION INC21 citations92

US6717415B2Apr 6, 2004

Circuit and method for determining the location of defect in a circuit

LOGICVISION INC23 citations92

US6691269B2Feb 10, 2004

Method for scan controlled sequential sampling of analog signals and circuit for use therewith

LOGICVISION INC40 citations92

US6330681B1Dec 11, 2001

Method and apparatus for controlling power level during BIST

LOGICVISION INC46 citations92

US6145105ANov 7, 2000

Method and apparatus for scan testing digital circuits

LOGICVISION INC42 citations92

US5659312AAug 19, 1997

Method and apparatus for testing digital to analog and analog to digital converters

LOGICVISION INC106 citations92

US7158899B2Jan 2, 2007

Circuit and method for measuring jitter of high speed signals

LOGICVISION INC34 citations91

US6895535B2May 17, 2005

Circuit and method for testing high speed data circuits

LOGICVISION INC19 citations91

US6615392B1Sep 2, 2003

Hierarchical design and test method and system, program product embodying the method and integrated circuit produced thereby

LOGICVISION INC44 citations89

US6567971B1May 20, 2003

Circuit synthesis method using technology parameters extracting circuit

LOGICVISION INC26 citations89

US6834361B2Dec 21, 2004

Method of testing embedded memory array and embedded memory controller for use therewith

LOGICVISION INC43 citations88

US6678875B2Jan 13, 2004

Self-contained embedded test design environment and environment setup utility

LOGICVISION INC40 citations88

US6961871B2Nov 1, 2005

Method, system and program product for testing and/or diagnosing circuits using embedded test controller access data

LOGICVISION INC45 citations86

US7219282B2May 15, 2007

Method and program product for designing hierarchical circuit for quiescent current testing and circuit produced thereby

LOGICVISION INC15 citations84

US6738938B2May 18, 2004

Method for collecting failure information for a memory using an embedded test controller

LOGICVISION INC17 citations84

US6614263B2Sep 2, 2003

Method and circuitry for controlling clocks of embedded blocks during logic bist test mode

LOGICVISION INC14 citations84

US6590412B2Jul 8, 2003

Circuit and method for detecting transient voltages on a dc power supply rail

LOGICVISION INC17 citations84

US7453255B2Nov 18, 2008

Circuit and method for measuring delay of high speed signals

LOGICVISION INC17 citations83

US7188274B2Mar 6, 2007

Memory repair analysis method and circuit

LOGICVISION INC12 citations82

US6703820B2Mar 9, 2004

Method and circuit for testing high frequency mixed signal circuits with low frequency signals

LOGICVISION INC12 citations74

US7103860B2Sep 5, 2006

Verification of embedded test structures in circuit designs

LOGICVISION INC7 citations72

US6862717B2Mar 1, 2005

Method and program product for designing hierarchical circuit for quiescent current testing

LOGICVISION INC9 citations72

US7191374B2Mar 13, 2007

Method of and program product for performing gate-level diagnosis of failing vectors

LOGICVISION INC9 citations71

US7257733B2Aug 14, 2007

Memory repair circuit and method

LOGICVISION INC5 citations63

US7424656B2Sep 9, 2008

Clocking methodology for at-speed testing of scan circuits with synchronous clocks

LOGICVISION INC3 citations62

Showing the top 50 of 51 patents by PatentIndex Score.

LOGICVISION INC

Top patents by PatentIndex Score

Method of designing circuit having multiple test access ports, circuit produced thereby and method of using same

Method and circuit for collecting memory failure information

Scan test method for providing real time identification of failing test patterns and test bist controller for use therewith

Method and apparatus for testing high performance circuits

Test access circuit and method of accessing embedded test controllers in integrated circuit modules

Method and circuit for testing DC parameters of circuit input and output nodes

Method and circuit for testing high frequency mixed signal circuits with low frequency signals

Programmable clock signal generation circuits and methods for generating accurate, high frequency, clock signals

Clock skew management method and apparatus

Asynchronous interface

Method for testability analysis and test point insertion at the RT-level of a hardware development language (HDL) specification

Method and apparatus for testing circuits with multiple clocks

Method and circuit for built in self test of phase locked loops

Method of testing at-speed circuits having asynchronous clocks and controller for use therewith

Test circuit and method for measuring switching point voltages and integral non-linearity (INL) of analog to digital converters

Method for at-speed testing of memory interface using scan

Clock controller for at-speed testing of scan circuits

Method for scan testing of digital circuit, digital circuit for use therewith and program product for incorporating test methodology into circuit description

Method of masking corrupt bits during signature analysis and circuit for use therewith

Method for testing circuits with tri-state drivers and circuit for use therewith

Circuit and method for adding parametric test capability to digital boundary scan

Circuit and method for accurately applying a voltage to a node of an integrated circuit

Method and program product for completing a circuit design having embedded test structures

Circuit and method for determining the location of defect in a circuit

Method for scan controlled sequential sampling of analog signals and circuit for use therewith

Method and apparatus for controlling power level during BIST

Method and apparatus for scan testing digital circuits

Method and apparatus for testing digital to analog and analog to digital converters

Circuit and method for measuring jitter of high speed signals

Circuit and method for testing high speed data circuits

Hierarchical design and test method and system, program product embodying the method and integrated circuit produced thereby

Circuit synthesis method using technology parameters extracting circuit

Method of testing embedded memory array and embedded memory controller for use therewith

Self-contained embedded test design environment and environment setup utility

Method, system and program product for testing and/or diagnosing circuits using embedded test controller access data

Boundary scan with strobed pad driver enable

Method and circuit for at-speed testing of scan circuits

Method and test circuit for testing memory internal write enable

Method and program product for designing hierarchical circuit for quiescent current testing and circuit produced thereby

Method for collecting failure information for a memory using an embedded test controller

Method and circuitry for controlling clocks of embedded blocks during logic bist test mode

Circuit and method for detecting transient voltages on a dc power supply rail

Circuit and method for measuring delay of high speed signals

Memory repair analysis method and circuit

Method and circuit for testing high frequency mixed signal circuits with low frequency signals

Verification of embedded test structures in circuit designs

Method and program product for designing hierarchical circuit for quiescent current testing

Method of and program product for performing gate-level diagnosis of failing vectors

Memory repair circuit and method

Clocking methodology for at-speed testing of scan circuits with synchronous clocks