Assignee
LIN MOU-SHIUNG
81 granted patents·5 pending applications·1,214 citations·filing 2002–2012
Top patents by PatentIndex Score
86 records- 0199US8503186B2System-in packagesLIN MOU-SHIUNG·Filed 2010·Granted Aug 6, 2013·143 cites·20 claims
- 0298US8456856B2Integrated circuit chip using top post-passivation technology and bottom structure technologyLIN MOU-SHIUNG·Filed 2010·Granted Jun 4, 2013·138 cites·20 claims
- 0398US8164171B2System-in packagesLIN MOU-SHIUNG·Filed 2010·Granted Apr 24, 2012·95 cites·20 claims
- 0497US8148806B2Multiple chips bonded to packaging structure with low noise and multiple selectable functionsLIN MOU-SHIUNG·Filed 2008·Granted Apr 3, 2012·46 cites·34 claims
- 0596US8193555B2Image and light sensor chip packagesLIN MOU-SHIUNG·Filed 2010·Granted Jun 5, 2012·29 cites·6 claims
- 0696US7482693B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Jan 27, 2009·24 cites·17 claims
- 0796US7382052B2Post passivation interconnection schemes on top of IC chipLIN MOU-SHIUNG·Filed 2007·Granted Jun 3, 2008·20 cites·20 claims
- 0895US7384864B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2005·Granted Jun 10, 2008·19 cites·19 claims
- 0995US7372155B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2005·Granted May 13, 2008·19 cites·110 claims
- 1095US7358610B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Apr 15, 2008·17 cites·21 claims
- 1195US7329954B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2005·Granted Feb 12, 2008·20 cites·95 claims
- 1294US8159070B2Chip packagesLIN MOU-SHIUNG·Filed 2010·Granted Apr 17, 2012·20 cites·12 claims
- 1394US7396756B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Jul 8, 2008·15 cites·20 claims
- 1494US7388292B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Jun 17, 2008·15 cites·21 claims
- 1594US7385292B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Jun 10, 2008·14 cites·20 claims
- 1694US7385291B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Jun 10, 2008·14 cites·20 claims
- 1794US7382058B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Jun 3, 2008·14 cites·20 claims
- 1894US7372085B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2005·Granted May 13, 2008·16 cites·24 claims
- 1994US7368376B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2005·Granted May 6, 2008·15 cites·20 claims
- 2094US7294870B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2005·Granted Nov 13, 2007·17 cites·93 claims
- 2194US6965165B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2003·Granted Nov 15, 2005·38 cites·15 claims
- 2293US8884433B2Circuitry component and method for forming the sameLIN MOU-SHIUNG·Filed 2009·Granted Nov 11, 2014·23 cites·22 claims
- 2393US8471388B2Integrated circuit and method for fabricating the sameLIN MOU-SHIUNG·Filed 2011·Granted Jun 25, 2013·15 cites·30 claims
- 2493US8421222B2Chip package having a chip combined with a substrate via a copper pillarLIN MOU-SHIUNG·Filed 2011·Granted Apr 16, 2013·11 cites·18 claims
- 2593US7397135B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Jul 8, 2008·13 cites·24 claims
- 2692US8421227B2Semiconductor chip structureLIN MOU-SHIUNG·Filed 2007·Granted Apr 16, 2013·27 cites·15 claims
- 2792US7425764B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Sep 16, 2008·11 cites·33 claims
- 2892US7294871B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2005·Granted Nov 13, 2007·11 cites·14 claims
- 2991US8187965B2Wirebond pad for semiconductor chip or waferLIN MOU-SHIUNG·Filed 2007·Granted May 29, 2012·20 cites·27 claims
- 3091US8188603B2Post passivation interconnection schemes on top of IC chipLIN MOU-SHIUNG·Filed 2007·Granted May 29, 2012·8 cites·14 claims
- 3191US7465975B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Dec 16, 2008·10 cites·23 claims
- 3291US7456100B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Nov 25, 2008·9 cites·20 claims
- 3391US7442969B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Oct 28, 2008·10 cites·24 claims
- 3491US7422976B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2005·Granted Sep 9, 2008·10 cites·17 claims
- 3590US8399989B2Metal pad or metal bump over pad exposed by passivation layerLIN MOU-SHIUNG·Filed 2006·Granted Mar 19, 2013·20 cites·40 claims
- 3690US8158508B2Structure and manufacturing method of a chip scale packageLIN MOU-SHIUNG·Filed 2007·Granted Apr 17, 2012·13 cites·36 claims
- 3789US8558383B2Post passivation structure for a semiconductor device and packaging process for sameLIN MOU-SHIUNG·Filed 2008·Granted Oct 15, 2013·16 cites·20 claims
- 3889US8471361B2Integrated chip package structure using organic substrate and method of manufacturing the sameLIN MOU-SHIUNG·Filed 2011·Granted Jun 25, 2013·7 cites·32 claims
- 3988US8319354B2Semiconductor chip with post-passivation scheme formed over passivation layerLIN MOU-SHIUNG·Filed 2011·Granted Nov 27, 2012·8 cites·33 claims
- 4086US9391021B2Chip package and method for fabricating the sameLIN MOU-SHIUNG·Filed 2009·Granted Jul 12, 2016·10 cites·16 claims
- 4185US8067837B2Metallization structure over passivation layer for IC chipLIN MOU-SHIUNG·Filed 2005·Granted Nov 29, 2011·12 cites·23 claims
- 4285US7360005B2Software programmable multiple function integrated circuit moduleLIN MOU-SHIUNG·Filed 2003·Granted Apr 15, 2008·31 cites·12 claims
- 4384US8148822B2Bonding pad on IC substrate and method for making the sameLIN MOU-SHIUNG·Filed 2006·Granted Apr 3, 2012·12 cites·32 claims
- 4483US8531038B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Sep 10, 2013·4 cites·27 claims
- 4583US8426958B2Stacked chip package with redistribution linesLIN MOU-SHIUNG·Filed 2011·Granted Apr 23, 2013·5 cites·26 claims
- 4683US8089155B2High performance system-on-chip discrete components using post passivation processLIN MOU-SHIUNG·Filed 2005·Granted Jan 3, 2012·9 cites·63 claims
- 4782US8853754B2Image and light sensor chip packagesLIN MOU-SHIUNG·Filed 2012·Granted Oct 7, 2014·5 cites·7 claims
- 4882US8304907B2Top layers of metal for integrated circuitsLIN MOU-SHIUNG·Filed 2007·Granted Nov 6, 2012·8 cites·20 claims
- 4981US8304766B2Semiconductor chip with a bonding pad having contact and test areasLIN MOU-SHIUNG·Filed 2011·Granted Nov 6, 2012·5 cites·21 claims
- 5080US8471384B2Top layers of metal for high performance IC'sLIN MOU-SHIUNG·Filed 2007·Granted Jun 25, 2013·3 cites·37 claims
Showing the top 50 of 86 patent records by PatentIndex Score.
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