Assignee
HOFSAESS MARKUS
0 granted patents·2 pending applications·0 citations·filing 2006–2006
Top patents by PatentIndex Score
2 records- 0137US2007192754A1Method for treating design errors of a layout of an integrated circuitHOFSAESS MARKUS·Filed 2006·Application pending·0 cites
- 0230US2006282720A1Method for the automatic provision of repair position data of fuse elements in integrated memory circuitHOFSAESS MARKUS·Filed 2006·Application pending·0 cites
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