Assignee
BLATCHFORD JAMES WALTER
US·10 granted patents·1 pending application·13 citations·filing 2009–2012
Top patents by PatentIndex Score
11 records- 0181US8461038B2Two-track cross-connects in double-patterned metal layers using a forbidden zoneBLATCHFORD JAMES WALTER·Filed 2012·Granted Jun 11, 2013·5 cites·16 claims
- 0275US8575020B2Pattern-split decomposition strategy for double-patterned lithography processBLATCHFORD JAMES WALTER·Filed 2012·Granted Nov 5, 2013·3 cites·10 claims
- 0363US8603905B2Dual alignment strategy for optimizing contact layer alignmentBLATCHFORD JAMES WALTER·Filed 2009·Granted Dec 10, 2013·2 cites·19 claims
- 0463US8455180B2Gate CD control using local design on both sides of neighboring dummy gate level featuresBLATCHFORD JAMES WALTER·Filed 2010·Granted Jun 4, 2013·1 cites·7 claims
- 0562US8584053B2Manufacturability enhancements for gate patterning process using polysilicon sub layerBLATCHFORD JAMES WALTER·Filed 2011·Granted Nov 12, 2013·1 cites·15 claims
- 0662US8580675B2Two-track cross-connect in double-patterned structure using rectangular viaBLATCHFORD JAMES WALTER·Filed 2012·Granted Nov 12, 2013·1 cites·14 claims
- 0750US8607170B2Perturbational technique for co-optimizing design rules and illumination conditions for lithography processBLATCHFORD JAMES WALTER·Filed 2012·Granted Dec 10, 2013·0 cites·20 claims
- 0846US10741489B2Rectangular via for ensuring via yield in the absence of via redundancyBLATCHFORD JAMES WALTER·Filed 2012·Granted Aug 11, 2020·0 cites·16 claims
- 0944US8751977B2Method for generating ultra-short-run-length dummy poly featuresBLATCHFORD JAMES WALTER·Filed 2010·Granted Jun 10, 2014·0 cites·7 claims
- 1039US2012148942A1Diagonal interconnect for improved process margin with off-axis illuminationBLATCHFORD JAMES WALTER·Filed 2010·Application pending·0 cites
- 1133US8138074B1ICs with end gates having adjacent electrically connected field polyBLATCHFORD JAMES WALTER·Filed 2010·Granted Mar 20, 2012·0 cites·15 claims
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